The fine fabrication technology of semiconductor devices, which has made a significant progress, is now confronted with a problem of an increasing off-leak current. An off-leak current means a current that flows into the subject semiconductor device while the device is idle. In the total power consumption of a semiconductor device, this unnecessarily flowing off-leak current has increased now up to a level that cannot be ignored. And in order to suppress the increase in this power consumption, there have been proposed various techniques so far.
For example, JP-A-2005-268695 discloses a technique related to a semiconductor integrated circuit having a function to cut off the power supply to each circuit cell. The semiconductor integrated circuit disclosed in this document includes plural circuit cells and plural power switch cells used to cut off the power supply to the circuit cells. The semiconductor integrated circuit further includes a plurality of power supply line groups disposed like vertical stripes at intervals narrower than a predetermined maximum interval and a plurality of branch line groups branched from those power supply line groups respectively and disposed like horizontal stripes within a range from the source power line groups to their adjacent power supply line groups respectively. In this semiconductor integrated circuit, each circuit cell is disposed along a branch line group and supplied a power from the branch line group. The power supply cell is disposed at a branch point between the power supply line group and its corresponding branch line group and used to cut off the power supply from the power supply line group to the branch line group. This document also describes a configuration of a semiconductor integrated circuit provided with a power switch cell having a driving power corresponding to the current consumption in accordance with the number of circuit cells. Furthermore, JP-A-2004-342924 discloses a method for disposing a capacity cell adjacent to a high driving cell so as to assist the power supply to the high driving cell.
Under such circumstances, the inventor of the present invention has considered that in a semiconductor integrated device as described above, the current consumption might differ among plural circuit cells. Consequently, when designing a semiconductor integrated circuit having a plurality of circuit cells among which the current consumption varies, therefore, the widths of the power line groups and the branch line groups, as well as the driving performance of the power switch cell are required to be determined in accordance with those of a circuit cell of which current consumption is more than any of others.
The more circuit pattern areas are reduced in size due to the progress of the fine fabrication technology of semiconductor devices, the smaller the wiring regions (wiring resources) also become. At this time, if a wiring width is determined for power line groups and branch line groups on the basis of the current consumption of a circuit cell that consumes a current more than any of others, the rate of the power supply wiring occupied by wiring resources to meet the reduction increases, thereby the wiring resources to be allocated to signal lines comes to decrease accordingly. Consequently, it becomes difficult to dispose those signal lines properly and this makes it further difficult to design the subject semiconductor device itself in some cases.
In case of securing a wiring resource to realize proper wiring of signal lines while keeping the power supply capacity, the wiring resource requiring area increases. Therefore, even when the subject circuit pattern is further reduced in size, the wiring resource requiring area makes it difficult to reduce the chip area in some cases. This is a new problem that has arisen due to the progress of the fine fabrication technology of semiconductor devices.